This invention relates to a semiconductor integrated circuit device and more specifically to an EPROM (Electrically Programmable Read Only Memory) device and to a method of manufacturing such a device.
Most ordinary EPROM devices comprise a memory array portion consisting of plural MIS (Metal-Insulator-Semiconductor) type memory transistors, each having a floating gate electrode, formed on the main surface of a semiconductor substrate, for storing charges and a control gate electrode formed on the gate electrode, and a peripheral circuit portion consisting of an input-output circuit and a decoder circuit consisting of plural MIS type transistors (hereinafter called "peripheral transistors"), formed in the periphery of the memory array portion.
In an EPROM device, conditions for forming the gate electrodes of the memory transistors and peripheral transistors are decisive factors for obtaining stable performance characteristics and for realizing high density of integration.
The present invention has been devised paying specific attention to the conditions for the formation of the gate electrodes.